Ideally, result tree construction happens before any output is generated, so a processor might output nothing if such a message is encountered. 理想情况下,结果树应该在生成任何输出之前建立,以便在遇到这样的消息处理程序时可以什么也不输出。
Although it may fail occasionally, the processor works hard to guarantee that the output is a well-formed XML document. 虽然偶尔可能出错,但处理程序尽量保证输出是结构良好的XML文档。
If you tell the processor not to escape the& in the output HTML, it writes. 如果告诉处理器不要转义输出HTML中的&,那么它会写下。
As mentioned before, the main job of the PPE in the Cell BE processor is to handle the input and output tasks. 正如前面介绍的一样,CellBE处理器中的PPE的主要任务是处理输入和输出任务。
Unlike JSP or PHP, an XSLT processor does not blindly write the tags in the output. 和JSP或PHP不同,XSLT处理程序并不是把标签盲目地写入输出。
When you first turn on a computer or reset it, the computer's processor begins execution at a well-known location in what's called the basic input/ output system ( BIOS). 当第一次启动计算机或重启时,计算机的处理器会在一个众所周知的位置开始执行,即基本输入/输出系统(BIOS)。
Like tangible long-lived assets, the value of the intangible assets is declining during the life of the assets. An interrupt that occurs independently of the processor such as upon completion of an input/ output operation. 与有形长期资产一样,无形资产的价值在资产生命期中不断递减。不受处理机制约而产生的一种中断,例如输入输出操作一旦完成而产生的中断。
A typical IR can be illustrated by the following diagram, which shows three components: input, processor and output. 一个典型的信息检索系统由三部分组成:输入,处理和输出。
An interrupt that occurs independently of the processor such as upon completion of an input/ output operation. 不受处理机制约而产生的一种中断,例如输入输出操作一旦完成而产生的中断。
Numerical control of machines-NC processor output-Logical structure GB/T12177-1990数子控制机床的数控处理程序输出逻辑结构
Word processor: Machine using computer logic to accept, store and retrieve documents for subsequent editing and output in typewriter style. 文字处理机:用电脑逻辑接收,贮存和提取文件,跟着作编辑和以打字款式输出的机器。
The following is the processor output, with line breaks added for clarity. 以下是处理器输出,为了清楚起见,增加了分行符。
Print processors are usually defined for a specific printer. Using another print processor may produce incorrect output. 打印处理程序通常是为特定打印机定义的。使用其他打印处理程序可能会产生不正确的输出结果。
Single chip processor F-V interface unit is a unit of converting the output signal of speed transducer for 6K locomotive into input signal demanded by domestic ZTL-3 automatic train stop apparatus. 单片机F-V接口装置是用于将6K机车速度传感器输出信号转换为适合于国产ZTL-3型自动停车装置输入要求的装置。
A processor dealing with the technique of 2-D graphics input/ output is pres-ented in this paper. By means of parametric code and dimension arrays 2-D graphics input/ output has been solved perfectly. 本文提出的2-D图形输入/出处理程序,用形状尺寸参数代码和尺寸数组表顺利地解决了2-D图形的输入问题。
It is composed of signal input channel ( A/ D transfer module), signal processor ( micro-chip controller), signal output channel ( D/ A transfer module) and wires, etc. 该导向信号处理装置由信号输入通道(A/D转换模块)、信号处理器(单片机)、信号输出通道(D/A转换模块)、导线等组成。
ABA processor is a noncoherent monopulse processor operating at the output of square low detector. The performance of an ABA proc(?) sor is insensitive to phase imbalances at the IF stage of a monopulse receiver. ABA处理器是工作在平方律检波器输出的非相参单脉冲处理器,其性能不受单脉冲接收机中频级相位不稳定的影响。
Chapter 4 discusses the design of video encoder hardware and the interface driver, including Blackfin processor, video input interface, stream output interface and the memory architecture. 第四章讨论了视频采集编码系统的硬件及其接口驱动程序的设计,由Blackfin处理器,视频输入接口,码流输出接口,外部存储器等组成。
DSPACE real-time simulation system owns a hardware system with high speed calculation capacity, furthermore, it includes high speed processor, input/ output, convenient code generator/ downloading and experiment/ debugging software environment. dSPACE实时系统拥有具有高速计算能力的硬件系统,包括处理器、I/O等,还拥有方便易用的实现代码生成/下载和试验/调试的软件环境。
And we set the stage for implement the active filter by using Digital Signal Processor ( DSP) to select out the harmonic compensation signal in the collection source signals and convert it to the output current analog signal as the controlling signal of the linear power filter. 并采用数字信号处理器(DSP)实现从采集的电源信号中分析出谐波补偿信号,并将此信号转换成模拟信号输出,作为有源电力滤波器的控制信号,使有源电力滤波成为可能。
The design and implementation of high-speed FFT processor for OFDM modulation is introduced through comparing and analyzing varieties conventional FFT algorithm. The proposed FFT processor simultaneously performs sequential input and output by applying an in-place algorithm for a mixed-radix multi-bank memory. 通过对通用算法对比和分析,介绍了一种利用混合基、多块存储器的原位算法构成、能够实现持续处理的多模式FFT处理器的设计和实现。
This paper presents a hardware architecture of area correlation processor for the implemention of absolute different distance method. The operating time of the digitalization of image to the output of matching position and matching correlation value is about 11 ms. 研究绝对差距离法的一种面相关处理器硬件结构,从图象数字化到正确输出匹配位置和匹配相关值的工作时间约为11ms。
The cutter spacing, machine tool configuration, and postposition processing were inputted through DEAS CAM postposition processor to get the output of NC processing program in machine tool. 通过DEASCAM后置处理器输入刀位、机床配置、后置处理程序等信息,可得到机床NC加工程序的输出。
The parallel storage processor includes four parts: parallel storage process arry, address transformation module, data parallel input module and output module. The parallel storage process array is the main body of parallel storage processor. 并行存储处理器包括并行存储处理阵列、地址变换模块、数据并行输入模块和输出模块四个功能部件,其中并行存储处理阵列是整个并行存储处理器的核心。
Meantime, the slave device from the network layer receives the package audio packets and passes to the digital audio processor, the I2S digital audio signal is output, then through the D/ A converter to get the output. 同时,从设备也可以从网络层中接受经过封装的音频数据包,传给数字音频处理器,输出I2S数字音频信号,之后通过D/A转换器输出。
In the system hardware design, the use of DSP digital signal processor, supported by intelligent power output module IPM AC servo control system constitutes a detailed description of the overall system hardware design. 在系统硬件设计方面,采用TMS320LF2407DSP数字信号微处理器,并辅以智能功率输出模块FSAM20SH60A构成交流伺服控制系统并详细介绍了整个系统的硬件设计。
The input gain element compresses the high dynamic range input signal, which is then processed by the low dynamic range signal processor ( filter and ADC) followed by expansion cell as output gain element. 输入增益单元压缩高动态范围的输入信号,其输出信号由较低动态范围的信号单元再经模数转换器(ADC)量化输出,扩展单元在数字域恢复信号动态范围。
Secondly, this dissertation designs the bottleneck bandwidth measurement software for the platform based on the network processor, which is used to measure end-to-end bottleneck bandwidth. In addition, the measurement scheme of the input-and output-port rates for the multi-network gateway is designed. 其次,在网络处理器平台上设计了瓶颈带宽测量软件,可用于多网网关的端到端的瓶颈链路带宽测量,论文还设计了多网网关的端口输入输出速率的测量方案。
Besides, we built a real-time passenger counting experiment system which using the network cameras to capture real-time image as input, general-purpose processor as the carrier and the monitor used to output the results. Also, we realized the proposed algorithm on the PC platform. 同时,还搭建了以网络摄像头采集实时彩色图像作为输入,PC平台的通用处理器为载体,显示器输出结果的实时自动乘客计数系统实验环境,并且将提出的算法在PC平台上实现。
Such as overall system structure design, basic processor design, recurring matrix inversion processor array design, output prediction processor array design, control increment calculation, parameter identification, and so on. 包括系统的总体结构设计,基本的处理器单元的设计,递推求逆算法的处理器阵列设计,输出预测的处理器阵列设计,控制增量的计算,参数辨识等。